D 4:- Design Verification engineer
Experience: 5 to 15years
Job location: Bangalore
Work experience on UVM and C based Test bench developments.
Experience on HSIO protocols like PCIe, Ethernet, DDR2/DD3/DDR4/DDR5, HBM, USB or Low power simulations (UPF), GLS verification, MIPI, CXL, HDMI, etc..
Strong debugging skill.
Good in programming, System Verilog, PLI/DPI interface, C/C++, PERL/Shell script, assembly language
Prior experience on AMD Stimgen flow, SOC-15 Architecture is an added advantage.
For Lead role, Experience in leading a team along with Individual contribution.
Monthly based
Bengaluru Urban,Karnataka,India
Bengaluru Urban,Karnataka,India